The total amount of jitter depends on the specific
implementation on silicon of the Control block in Fig. 1. If it
is assumed that the effects of jitter are caused by thermal and
flicker noise sources in the circuit implementing the Control
block and that these contributions can be added to the fourth
entry of the main diagonal of Bw(xs(τ )) in (7) according to
[2], the effects of jitter on the phase noise at the A node can be
computed. To this end, the v14(t) component of v1(t) in Fig. 4
(fourth panel) is of main importance since, as already said, it
is different from 0 in the interval between the zero crossing of
vc(t) and the opening of S. This means that noise influencing
the delay in closing and opening S is “transferred” as phase
noise at node A. Fig. 7 shows the phase noise component
due to jitter versus the Td/(T/4) normalized delay at 1-mHz
offset frequency. The result depends on the value chosen for a
parameter η representing the equivalent power spectral density
of the thermal noise sources in Control. For the case in Fig. 7,
η = 10−8. This is a novel result that has never been presented in
literature before. The large impact on the total performance of
the oscillator is evident. The result changes and vertically shifts
according to (6) and to the value of η.