The STM32 F1 has a sophisticated clock system. There are two primary
external sources of timing – HSE and LSE. The HSE signal is derived from an
8MHz crystal or other resonator, and the LSE signal is derived from a 32.768
kHz crystal. Internally, the HSE is multiplied in frequency through the use of
a PLL; the output of this, SYSCLK is used to derive (by division) various onchip
time sources include clocks for the ABP1 and APB2 peripherals as well as
for the various programmable timers. The LSE is used to manage a low-power
real-time clock. The STM32F100 micro-controllers can support a maximum
SYSCLK frequency of 24MHz while the other STM32 F1xx micro-controllers
support a SYSCLK frequency of 72MHz. Fortunately, most of the code required
to manage these clocks is provided in the standard peripheral library
module (system_stm32f10x.[ch]) which provides an initialization function
– SystemInit(void) to be called at startup. This module also exports a variable
SystenCoreClock which contains the SYSCLK frequency; this simplifies