Spinlocks based on atomic test&set commands are an
essential component of operating systems and also necessary
for the synchronization of multiple cores. Generally, they are
only investigated at the assembly level. When trying to use
these mechanism on the ZPU, it becomes evident that it is
not possible to implement them using the bus and memory
system. To use the necessary atomic test&set capability, the
shared register file has to be applied.
For verification of the cordic coprocessor, the shared reg-isters, cache system and interface to the external memory and
special test programs are developed. These programs can then
be used in other classes dealing with circuit design to verify the
actual chip. Amongst others, the tests include a prime number
test, a cordic test program and a game of life simulation
which heavily utilizes the shared register file with the locking
mechanism.
B. VHDL Circuit Design Class
With the availability of the ZPU sources, valuable insights
are possible. Instead of a vague schematic of the inner structure
being presented, a detailed implementation of an actual pro-cessor can be achieved. Compared to other designs previously