Once MacroOPs are decoded, up to three MacroOPs per cycle
are dispatched to the instruction control unit (ICU). The ICU is
a 72-entry MacroOP reorder buffer (ROB) that manages the
execution and retirement of all MacroOPs, performs register
renaming for operands, and controls any exception conditions
and instruction retirement operations. The ICU dispatches the
MacroOPs to the AMD Athlon processor’s multiple execution
unit schedulers