The CM3 processor implements the Thumb-2 instruction set which provides
a large set of 16-bit instructions, enabling 2 instructions per memory
fetch, along with a small set of 32-bit instructions to support more complex
operations. The specific details of this instruction set are largely irrelevant for
this book as we will be performing all our programming in C. However, there
are a few key ideas which we discuss in the following.
As with all RISC processors, the Cortex-M3 is a load/store architecture
with three basic types of instructions – register-to-register operations for
processing data, memory operations which move data between memory and
registers, and control flow operations enabling programming language control
flow such as if and while statements and procedure calls. For example, suppose
we define the following rather trivial C-procedure
The CM3 processor implements the Thumb-2 instruction set which provides
a large set of 16-bit instructions, enabling 2 instructions per memory
fetch, along with a small set of 32-bit instructions to support more complex
operations. The specific details of this instruction set are largely irrelevant for
this book as we will be performing all our programming in C. However, there
are a few key ideas which we discuss in the following.
As with all RISC processors, the Cortex-M3 is a load/store architecture
with three basic types of instructions – register-to-register operations for
processing data, memory operations which move data between memory and
registers, and control flow operations enabling programming language control
flow such as if and while statements and procedure calls. For example, suppose
we define the following rather trivial C-procedure
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