technique uses hint instructions to filter the accesses to the
branch predictor. The combined effects of both static and
dynamic information to predict a branch provide a significant
energy reduction. Experimental results have shown
that this technique can achieve an average access saving to
the branch predictor of 93% with respect to a cycle-by-cycle
access, which corresponds to 9% total processor energy reduction
at the cost of 1% average performance loss. When
HI-based technique is adopted in the Lx processor to enhance
the original architecture with dynamic branch prediction,
it gets a significant improvement of the energy-delay
metric.
As future evolutions of the present work we are evaluating
other architectures and related simulation environments,
as well as compiler-based techniques to extensively support
low-power dynamic branch prediction techniques.