In CMOS circuits will operate on a supply voltage(VDD) between 3V and 8V,consequently the logic thresholds are determined by the actual supply voltage that is used.
0 is represented by voltages between 0v and 1/3 of VDD, and 1 by voltages between 2/3 of VDD and VDD as shown in Figure 1-1 (B).
By allocating voltages thresholds in this fashion very definite regions of the pulse relate to the two logic levels.