Harmonic balance simulation on ADS simulation software
was carried out to determine the number of stages required to
achieve minimum voltage output of 2 V. Three different
topologies were simulated with cascading number of stages.
Center frequency remained at 2.45 GHz. Input RF signal was
fixed at 0 dBm and simulation carried out using HSMS2860
Schottky diodes with load resistance of 1 M. The various
single stage voltage multiplier topologies are shown in Fig.7
to Fig. 9.