Simplicity in DesignSimplicity is o

Simplicity in Design
Simplicity is often said to be the ultimate sophistication. This is definitely true In regard to the number of gates and flip-flops required to implement a certain Logic function the less parts a system has, the less chance for failure there is two ways of simplifying a system design will now be presented.
Gate Reduction. Logic gating in a system can usually be simplified from the first-cut design by applying the theories of Boolean algebra. An on gate feeding an on gate can be consolidated into one large OR gate, and an AND gate feeding an AND gate can be combined also. Figure 6-4 illustrates some of the most Common logical reductions.
In system design, there are a few conflicts that do not arise in theoretical Boolean algebra. The first is package count. It is better to have three packages Of 2-input on gates than four packages of optimal Boolean gating. As long as the Combination of gates causes no unacceptable propagation delay, it is wisest to Opt for the lowest package count.
Another conflict is having spare gates after a design is completed. If an AND Gate and three’ inverters are available as spares, it is wiser to use them to make an on gate than to add a new chip to the design.
One of the most powerful Boolean algebra laws for gate reduction. Especially when wired-or connections are allowed, is De Morgan’s law. This law can help change AND gates to on gates and vice versa. This law can be related as a complex Boolean expression, but an easier way to remember it is: change the outputs, change the input, and change the gate (from an AND to on, or an OR to AND). Because inverting outputs are usually available on flip-flops and registers. This can easily be accomplished in most cases. lt can reduce signal propagation time. Figure 6-4(c) shows such an ECL reduction that saves parts as well as increases speed.