Abstract-The continued physical fea

Abstract-The continued physical feature size scaling of complementary
Metal Oxide Semiconductor (CMOS) transistors is
experiencing asperities due to several factors, and it is expected
to reach its boundary at size of 22 nm technology by 2018. This
paper discusses and analyzes the main challenges and limitations
of CMOS scaling, not only from physical and technological
point of view, but also from material (e.g., high-k vs. lowk)
and economical point of view as well. The paper also
addresses alternative non-CMOS devices (i.e., nanodevices) that
are potentially able to solve the CMOS problems and limitations