A MAGIC simulation with PML circuit terminations(return loss = ~ 30 dB) is shown in Fig. 2. A 50 mW input signal (0.22 THz) is inserted at the first period of the vane
array. The simulation model also includes a periodic pulse driver (pulse width = 6.7 ps and period = 1 ns) toartificially account for white background noise which might seed unstable oscillations. In Fig. 2(a), the power is rapidly amplified in the axial direction and gradually falls off after saturation, which occurs at ~ 34 mm for these
conditions. The maximum power is ~ 180 W at ~ 34 mm, and our minimum power goal of 50 W is achieved at an axial position of 25 mm. In Fig. 2(b), the time-dependent
power, measured at the 34 mm saturation position, remains quite stable during the entire simulation, with a monochromatic frequency spectrum (inset). CST PIC Simulator (PS) also predicted a similar result in that the circuit produces ~ 200 W (average) output power at the output port with distinct beam modulation in the forward direction. These PIC simulations verified that no noticeable cutoff oscillation and mode competition, described in Fig. 1(b), arise with the perfectly matched boundary condition assumption within the numerical convergence time frame. The circuit performance was also analyzed over the pass band by frequency scan using the Christine-1D code. Figure 3 displays summary graphs of frequency versus gain and input power versus output power for a 2.4 cm long circuit. The saturated output power converges to ~ 160 W, corresponding to ~ 24 dB (at 0.22 THz). These simulation results indicate that the circuit itself stably operates over the bandwidth with ideal input/output impedance matching (~ 30 dB return loss)