The Class D amplifier topology theoretically offers ideal characteristics for audio: 100% efficiency, 0% THD, and no audible noise. While practical Class D implementations can come attractively close to realizing the ideal, they also occupy less space than competing topologies—most notably Class AB—owing largely to their superior efficiency. The power device’s characteristics, however, can limit the performance of a design. Careful attention to device selection is essential to optimizing amplifier performance.
As an amplifier’s output power capability increases, Class D’s efficiency advantages over Class AB becomes increasingly profound. Despite the historical image that switching amplifiers can never outperform linear amplifiers, well-designed, modern Class D amplifiers deliver excellent audio performance with advanced silicon technologies.
For better audio performance, the shape and timing of switching waveforms hold the key. In order to obtain good THD+N, the waveform has to be sharp and clean with accurate switching timing relative to the PWM modulator’s output.
Deadtime in the power stage’s output waveform creates a non-linearity due to alternating commutation current from the output inductor. The deadtime subtracts from the modulator’s output pulse width when the speaker’s load current is larger than the inductor ripple current. Consequently, the Class D stage gain varies as a function of the output current—a behavior that creates harmonic distortion. Unfortunately, though reducing deadtime reduces THD, it also increases the danger of shoot-through current.
Start with deadtime
A gate-driver IC with built-in deadtime generation enables known deadtime settings over differing conditions. For example, an IRS20124S Class D audio gate driver from International Rectifier controls the deadtime to compensate for variations and drifts within the driver IC due to changes in conditions such as temperature. This ensures optimum deadtime performance, Figure 1.