3.1.1 Available ActionsConcurrently

3.1.1 Available Actions

Concurrently to sensing the environment’s state (Section 3.1.3), the scheduler determines whether a valid DRAM command exists for each pending memory request among:
Activate: Bring the contents of a bank’s DRAM row into the bank’s row buffer.
Precharge: Write the contents of a bank’s row buffer back to the corresponding DRAM row. We categorize as a separate action the case where there are no active requests for a particular (open) row, yet the scheduler still may choose to preemptively precharge; we call this Preemptive Precharge.
Read(Load), Read(Store): Perform a read from a bank’s row buffer.
Write: Perform a write to a bank’s row buffer.
Rank Power Down (PwDn): Place the corresponding rank into a low power mode. When a rank is in low power mode, it cannot be accessed. Current DRAM subsystems already provide support for such low-power rank modes; in our implementation, we use those of the DDR3 interface [2].
Rank Power Up (PwUp): Bring the corresponding rank back to normal operation mode.
NoOp: If no legal DRAM command exists for this cycle (often due to DRAM timing constraints), the scheduler will do nothing and wait for the next cycle. (But a rank may remain powered down even if PwUp is a legal command.)